STM32+W5500 не работает

#include"stdbool.h"
#include"stm32f1xx.h"
#include"SPI.h"
 
void SPI1_ini(void)
{
    RCC->APB2ENR |= RCC_APB2ENR_SPI1EN | RCC_APB2ENR_IOPAEN ; //Turn on clock PORTA and SPI1
    
    //---------------------Settings Altrnative function PORTA--------------------
    //---------------------------------------------------------------------------   
    //---------------------------------------------------------------------------   
    //SCK: PA5  
        GPIOA->CRL &= ~(GPIO_CRL_MODE5_0 | GPIO_CRL_MODE5_1);//reset
        GPIOA->CRL &= ~(GPIO_CRL_CNF5_0  | GPIO_CRL_CNF5_1 );//reset    
        GPIOA->CRL |=  (GPIO_CRL_MODE5_0 | GPIO_CRL_MODE5_1);// Mode output 50 MHz PA5  
        GPIOA->CRL |= GPIO_CRL_CNF5_1;//Alternate function  output Push-pull
    //---------------------------------------------------------------------------
    //---------------------------------------------------------------------------
    //MISO: PA6 
        GPIOA->CRL &= ~(GPIO_CRL_MODE6_0 | GPIO_CRL_MODE6_1);//reset
        GPIOA->CRL &= ~(GPIO_CRL_CNF6_0  | GPIO_CRL_CNF6_1 );//reset
        GPIOA->CRL |= GPIO_CRL_CNF6_0;//Floating input
    //----------------------------------------------------------------------------
    //---------------------------------------------------------------------------   
    //MOSI: PA7 
        GPIOA->CRL &= ~(GPIO_CRL_MODE7_0 | GPIO_CRL_MODE7_1);//reset
        GPIOA->CRL &= ~(GPIO_CRL_CNF7_0  | GPIO_CRL_CNF7_1 );//reset
        GPIOA->CRL |= GPIO_CRL_MODE7_0 | GPIO_CRL_MODE7_1 ;
        GPIOA->CRL |= GPIO_CRL_CNF7_1 ;
    //---------------------------------------------------------------------------
    //CS: PA12
        GPIOA->CRH |= GPIO_CRH_MODE12_1 | GPIO_CRH_MODE12_0 ;// Output 50MHz
        GPIOA->CRH &= ~(GPIO_CRH_CNF12_1 | GPIO_CRH_CNF12_0 );// Output push-pull 
        GPIOA->BSRR |= GPIO_BSRR_BS12; //Up PINA12
    //---------------------------------------------------------------------------
    //---------------------------------------------------------------------------
    //---------------------------------------------------------------------------
    
    //1. Select the BR[2:0] bits to define the serial clock baud rate (see SPI_CR1 register).
        SPI1->CR1 &= ~( SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0 ) ; // divider 2
        //Uncomment the necessary divisor
        SPI1->CR1 |= ( SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0 ) ; //divider 256
        //SPI1->CR1 |= ( SPI_CR1_BR_2 | SPI_CR1_BR_1 ) ;              //divider 128
        //SPI1->CR1 |= ( SPI_CR1_BR_2 | SPI_CR1_BR_0 ) ;              //divider 64
        //SPI1->CR1 |= ( SPI_CR1_BR_2 ) ;                             //divider 32
        //SPI1->CR1 |= ( SPI_CR1_BR_1 | SPI_CR1_BR_0 ) ;              //divider 16
        //SPI1->CR1 |= ( SPI_CR1_BR_1 ) ;                             //divider 8
        //SPI1->CR1 |= ( SPI_CR1_BR_0 ) ;                             //divider 4
    //---------------------------------------------------------------------------
    
    
    //2. Select the CPOL and CPHA bits to define one of the four relationships between the
    //data transfer and the serial clock
        //CPOL: Clock polarity 0: CK to 0 when idle
        //CPHA: Clock phase 0: The first clock transition is the first data capture edge
        SPI1->CR1 &= ~( SPI_CR1_CPOL | SPI_CR1_CPHA );
    //---------------------------------------------------------------------------
    
    
    //3. Set the DFF bit to define 8- or 16-bit data frame format
    //DFF: Data frame format 0: 8-bit data frame format is selected for transmission/reception
        SPI1->CR1 &= ~SPI_CR1_DFF ;
    //---------------------------------------------------------------------------
    
    
    //4. Configure the LSBFIRST bit in the SPI_CR1 register to define the frame format
    //LSBFIRST: Frame format 0: MSB transmitted first
        SPI1->CR1 &= ~SPI_CR1_LSBFIRST; 
    //---------------------------------------------------------------------------
    
    
    //5. If the NSS pin is required in input mode, in hardware mode, connect the NSS pin to a
    //high-level signal during the complete byte transmit sequence. In NSS software mode,
    //set the SSM and SSI bits in the SPI_CR1 register. If the NSS pin is required in output
    //mode, the SSOE bit only should be set.
    //We don't use this function
    //---------------------------------------------------------------------------
    
    
    //6. The MSTR and SPE bits must be set (they remain set only if the NSS pin is connected
    //to a high-level signal)
    //MSTR: Master selection 0: Slave configuration ; 1: Master configuration ;
        SPI1->CR1 &= ~SPI_CR1_MSTR ;
        SPI1->CR1 |= SPI_CR1_MSTR ;
    //---------------------------------------------------------------------------
    //---------------------------------------------------------------------------
    //---------------------------------------------------------------------------
    
    
    //BIDIMODE: Bidirectional data mode enable 
    //0: 2-line unidirectional data mode selected
    //1: 1-line bidirectional data mode selected
        SPI1->CR1 &= ~SPI_CR1_BIDIMODE;
    //---------------------------------------------------------------------------
    
    
    //RXONLY: Receive only
    //This bit combined with the BIDImode bit selects the direction of transfer in 2-line
    //unidirectional mode. This bit is also useful in a multislave system in which this particular
    //slave is not accessed, the output from the accessed slave is not corrupted.
    //0: Full duplex (Transmit and receive)
    //1: Output disabled (Receive-only mode)
        //SPI1->CR1 &= ~SPI_CR1_RXONLY;
    //---------------------------------------------------------------------------
    //---------------------------------------------------------------------------
    
    
        unsigned int count = 0;
        while(1)
        {
            count++;
            if(count == 25000) break;
            __NOP();
        }
    //---------------------------------------------------------------------------   
        // Set TX interrupt
        //SPI1->CR2 |= SPI_CR2_TXEIE;
        // Set RX interrupt
        //SPI1->CR2 |= SPI_CR2_RXNEIE;
        
        //Set SPE: SPI enable 0: Peripheral disabled ; 1: Peripheral enabled ;
        SPI1->CR1 &= ~SPI_CR1_SPE ;
        SPI1->CR1 |= SPI_CR1_SPE ;
    //---------------------------------------------------------------------------
}
///////////////////////////////////////////////////////////////////////////////
void SPI1_TX_8bit(uint8_t *data, uint8_t lengthData)
{
    //uint8_t count = 0;
    while(!(SPI1->SR & SPI_SR_TXE)){}
    while((SPI1->SR & SPI_SR_BSY) == SPI_SR_BSY_Msk){}
    //uint16_t read_ =  SPI1->DR;
    //while(!(SPI1->SR & SPI_SR_TXE)){count++;if(count == 240) return;}
    while(lengthData!=0) 
    {
        SPI1->DR = *data++;
        lengthData--;
    }
}
///////////////////////////////////////////////////////////////////////////////
void SPI1_DROP_CS(void)
{
    while(!(SPI1->SR & SPI_SR_TXE)){}
    GPIOA->BRR = GPIO_BRR_BR12;
}
///////////////////////////////////////////////////////////////////////////////
void SPI1_UP_CS(void)
{ 
    uint8_t count = 0;
    while((SPI1->SR & SPI_SR_TXE) == ~SPI_SR_TXE_Msk){}
    //while((SPI1->SR & SPI_SR_RXNE) == SPI_SR_RXNE_Msk){}
    while((SPI1->SR & SPI_SR_BSY) == SPI_SR_BSY_Msk){}
    while(1){count++;if(count == 75){ count = 0; break;}__NOP();}
    GPIOA->BSRR = GPIO_BSRR_BS12;
}
///////////////////////////////////////////////////////////////////////////////
uint8_t SPI1_Read(void)
{
 // SPI1->DR = 0; //запускаем обмен
  
  //Ждем, пока не появится новое значение 
  //в буфере приемника
  while(!(SPI1->SR & SPI_SR_RXNE))
    ;
  
  //возвращаем значение буфера приемника
  return SPI1->DR;
}

/*
*/
#include"stdbool.h"
#include"w5500.h"
#include"stdint.h"
#include"SPI.h"
#include"math.h"
#include"stm32f1xx.h"
 
//Шлюз
static uint8_t GatewayAddress [4] = { 0xC0, 0xA8, 0x00, 0x01};//192.168.0.1
//static uint8_t *ptr_GatewayAddress = GatewayAddress;
//Маска подсети
static uint8_t SubnetMaskAddress [4] = {0xFF,0xFF,0xFF,0x00};//255.255.255.0
//static uint8_t *ptr_SubnetMaskAddress = SubnetMaskAddress;
//MAC адрес
// FF 23 5F 63 21 38
static uint8_t SourceHardwareAddress [6] =  { 0xFF, 0x23, 0x5F, 0x63, 0x21, 0x38 };
//static uint8_t *ptr_SourceHardwareAddress = SourceHardwareAddress;
//IP источника
static uint8_t SourceIPAddress [4] = { 0xC0, 0xA8, 0x00, 0x0F};// 192.168.0.40
////////////////////////////////////////////////////////////////////////////////
static uint8_t NUM_PORT_SOCKET_0_1 = 0x13;
static uint8_t NUM_PORT_SOCKET_0_0 = 0x88;
////////////////////////////////////////////////////////////////////////////////
 
 
 
 
 
 
//Функция отправки адреса и контрольной суммы режим отправки неограниченной длины
void WriteAddrPhaseANDControlPhase(uint16_t AddrPhase, uint8_t BSB, bool RorW)
{
    uint8_t data = 0;
    uint8_t *ptr_data = &data;
    data = AddrPhase>>8;
    SPI1_TX_8bit(ptr_data,sizeof(data));//TX Hight Bits Addr
    data = 0;
    data |= (uint8_t)AddrPhase;
    SPI1_TX_8bit(ptr_data,sizeof(data));//TX Low Bits Addr
    data = 0;
    data |= (BSB << 3);
    if(RorW == true) data |= 1 << 2;
    SPI1_TX_8bit(ptr_data,sizeof(data));
}
 
void W5500IniGARx_SUBRx_SHARx_SIPRx(void)
{
        //uint8_t count = 0;
    //--------------------------------------------------------------------------------
        SPI1_DROP_CS();
        WriteAddrPhaseANDControlPhase(GAR0, SelectsComonRegister, true);
    //Transmit GatewayAddress
        SPI1_TX_8bit(GatewayAddress, sizeof(GatewayAddress[0]));
        SPI1_TX_8bit(GatewayAddress+1, sizeof(GatewayAddress[1]));
        SPI1_TX_8bit(GatewayAddress+2, sizeof(GatewayAddress[2]));
        SPI1_TX_8bit(GatewayAddress+3, sizeof(GatewayAddress[3]));
        SPI1_UP_CS();
        //while(count != 240 ){count++;__NOP();__NOP();}
    //--------------------------------------------------------------------------------
    //Transmit SubnetMaskAddress
        //SPI1_DROP_CS();
        //WriteAddrPhaseANDControlPhase(SUBR0, SelectsComonRegister, true);
    /*  SPI1_TX_8bit(SubnetMaskAddress, sizeof(SubnetMaskAddress[0]));
        SPI1_TX_8bit(SubnetMaskAddress+1, sizeof(SubnetMaskAddress[1]));
        SPI1_TX_8bit(SubnetMaskAddress+2, sizeof(SubnetMaskAddress[2]));
        SPI1_TX_8bit(SubnetMaskAddress+3, sizeof(SubnetMaskAddress[3]));
        //SPI1_UP_CS();
        //while(count !=240 ){count++;__NOP();__NOP();}
    //--------------------------------------------------------------------------------
    //Transmit SourceHardwareAddress
        //SPI1_DROP_CS();
        //WriteAddrPhaseANDControlPhase(SHAR0, SelectsComonRegister, true);
        SPI1_TX_8bit(SourceHardwareAddress, sizeof(SourceHardwareAddress[0]));
        SPI1_TX_8bit(SourceHardwareAddress+1, sizeof(SourceHardwareAddress[1]));
        SPI1_TX_8bit(SourceHardwareAddress+2, sizeof(SourceHardwareAddress[2]));
        SPI1_TX_8bit(SourceHardwareAddress+3, sizeof(SourceHardwareAddress[3]));
        SPI1_TX_8bit(SourceHardwareAddress+4, sizeof(SourceHardwareAddress[4]));
        SPI1_TX_8bit(SourceHardwareAddress+5, sizeof(SourceHardwareAddress[5]));
        //SPI1_UP_CS();
        //while(count !=240 ){count++;__NOP();__NOP();}
    //--------------------------------------------------------------------------------
    //Transmit SourceHardwareAddres
        //SPI1_DROP_CS();
        //WriteAddrPhaseANDControlPhase(SIPRO0, SelectsComonRegister, true);
        SPI1_TX_8bit(SourceIPAddress, sizeof(SourceIPAddress[0]));
        SPI1_TX_8bit(SourceIPAddress+1, sizeof(SourceIPAddress[1]));
        SPI1_TX_8bit(SourceIPAddress+2, sizeof(SourceIPAddress[2]));
        SPI1_TX_8bit(SourceIPAddress+3, sizeof(SourceIPAddress[3]));
        SPI1_UP_CS();
        //while(count !=240 ){count++;__NOP();__NOP();}*/
    //--------------------------------------------------------------------------------
}
//////////////////////////////////////////////////////////////////////////////////////////
 
 
void W5500_SettingsSocket(void)
{
    SPI1_DROP_CS();
    WriteAddrPhaseANDControlPhase(Sn_PORT0,SelectsSoket0Register,true);
    SPI1_TX_8bit(&NUM_PORT_SOCKET_0_1,sizeof(NUM_PORT_SOCKET_0_1));
    SPI1_TX_8bit(&NUM_PORT_SOCKET_0_0,sizeof(NUM_PORT_SOCKET_0_0));
    SPI1_UP_CS();
}