Управление генератором SI5153 c помощью платы Raspberry Pi Pico

import machine
import time
from array import array
 
# I2C setup
i2c = machine.I2C(0, scl=machine.Pin(21), sda=machine.Pin(20), freq=400000)
 
SI5351_ADDRESS = 0x60
 
SI5351_REGISTER_0_DEVICE_STATUS                       = 0
SI5351_REGISTER_1_INTERRUPT_STATUS_STICKY             = 1
SI5351_REGISTER_2_INTERRUPT_STATUS_MASK               = 2
SI5351_REGISTER_3_OUTPUT_ENABLE_CONTROL               = 3
SI5351_REGISTER_9_OEB_PIN_ENABLE_CONTROL              = 9
SI5351_REGISTER_15_PLL_INPUT_SOURCE                   = 15
SI5351_REGISTER_16_CLK0_CONTROL                       = 16
SI5351_REGISTER_17_CLK1_CONTROL                       = 17
SI5351_REGISTER_18_CLK2_CONTROL                       = 18
SI5351_REGISTER_19_CLK3_CONTROL                       = 19
SI5351_REGISTER_20_CLK4_CONTROL                       = 20
SI5351_REGISTER_21_CLK5_CONTROL                       = 21
SI5351_REGISTER_22_CLK6_CONTROL                       = 22
SI5351_REGISTER_23_CLK7_CONTROL                       = 23
SI5351_REGISTER_24_CLK3_0_DISABLE_STATE               = 24
SI5351_REGISTER_25_CLK7_4_DISABLE_STATE               = 25
SI5351_REGISTER_42_MULTISYNTH0_PARAMETERS_1           = 42
SI5351_REGISTER_43_MULTISYNTH0_PARAMETERS_2           = 43
SI5351_REGISTER_44_MULTISYNTH0_PARAMETERS_3           = 44
SI5351_REGISTER_45_MULTISYNTH0_PARAMETERS_4           = 45
SI5351_REGISTER_46_MULTISYNTH0_PARAMETERS_5           = 46
SI5351_REGISTER_47_MULTISYNTH0_PARAMETERS_6           = 47
SI5351_REGISTER_48_MULTISYNTH0_PARAMETERS_7           = 48
SI5351_REGISTER_49_MULTISYNTH0_PARAMETERS_8           = 49
SI5351_REGISTER_50_MULTISYNTH1_PARAMETERS_1           = 50
SI5351_REGISTER_51_MULTISYNTH1_PARAMETERS_2           = 51
SI5351_REGISTER_52_MULTISYNTH1_PARAMETERS_3           = 52
SI5351_REGISTER_53_MULTISYNTH1_PARAMETERS_4           = 53
SI5351_REGISTER_54_MULTISYNTH1_PARAMETERS_5           = 54
SI5351_REGISTER_55_MULTISYNTH1_PARAMETERS_6           = 55
SI5351_REGISTER_56_MULTISYNTH1_PARAMETERS_7           = 56
SI5351_REGISTER_57_MULTISYNTH1_PARAMETERS_8           = 57
SI5351_REGISTER_58_MULTISYNTH2_PARAMETERS_1           = 58
SI5351_REGISTER_59_MULTISYNTH2_PARAMETERS_2           = 59
SI5351_REGISTER_60_MULTISYNTH2_PARAMETERS_3           = 60
SI5351_REGISTER_61_MULTISYNTH2_PARAMETERS_4           = 61
SI5351_REGISTER_62_MULTISYNTH2_PARAMETERS_5           = 62
SI5351_REGISTER_63_MULTISYNTH2_PARAMETERS_6           = 63
SI5351_REGISTER_64_MULTISYNTH2_PARAMETERS_7           = 64
SI5351_REGISTER_65_MULTISYNTH2_PARAMETERS_8           = 65
SI5351_REGISTER_66_MULTISYNTH3_PARAMETERS_1           = 66
SI5351_REGISTER_67_MULTISYNTH3_PARAMETERS_2           = 67
SI5351_REGISTER_68_MULTISYNTH3_PARAMETERS_3           = 68
SI5351_REGISTER_69_MULTISYNTH3_PARAMETERS_4           = 69
SI5351_REGISTER_70_MULTISYNTH3_PARAMETERS_5           = 70
SI5351_REGISTER_71_MULTISYNTH3_PARAMETERS_6           = 71
SI5351_REGISTER_72_MULTISYNTH3_PARAMETERS_7           = 72
SI5351_REGISTER_73_MULTISYNTH3_PARAMETERS_8           = 73
SI5351_REGISTER_74_MULTISYNTH4_PARAMETERS_1           = 74
SI5351_REGISTER_75_MULTISYNTH4_PARAMETERS_2           = 75
SI5351_REGISTER_76_MULTISYNTH4_PARAMETERS_3           = 76
SI5351_REGISTER_77_MULTISYNTH4_PARAMETERS_4           = 77
SI5351_REGISTER_78_MULTISYNTH4_PARAMETERS_5           = 78
SI5351_REGISTER_79_MULTISYNTH4_PARAMETERS_6           = 79
SI5351_REGISTER_80_MULTISYNTH4_PARAMETERS_7           = 80
SI5351_REGISTER_81_MULTISYNTH4_PARAMETERS_8           = 81
SI5351_REGISTER_82_MULTISYNTH5_PARAMETERS_1           = 82
SI5351_REGISTER_83_MULTISYNTH5_PARAMETERS_2           = 83
SI5351_REGISTER_84_MULTISYNTH5_PARAMETERS_3           = 84
SI5351_REGISTER_85_MULTISYNTH5_PARAMETERS_4           = 85
SI5351_REGISTER_86_MULTISYNTH5_PARAMETERS_5           = 86
SI5351_REGISTER_87_MULTISYNTH5_PARAMETERS_6           = 87
SI5351_REGISTER_88_MULTISYNTH5_PARAMETERS_7           = 88
SI5351_REGISTER_89_MULTISYNTH5_PARAMETERS_8           = 89
SI5351_REGISTER_90_MULTISYNTH6_PARAMETERS             = 90
SI5351_REGISTER_91_MULTISYNTH7_PARAMETERS             = 91
SI5351_REGISTER_92_CLOCK_6_7_OUTPUT_DIVIDER           = 92
SI5351_REGISTER_165_CLK0_INITIAL_PHASE_OFFSET         = 165
SI5351_REGISTER_166_CLK1_INITIAL_PHASE_OFFSET         = 166
SI5351_REGISTER_167_CLK2_INITIAL_PHASE_OFFSET         = 167
SI5351_REGISTER_168_CLK3_INITIAL_PHASE_OFFSET         = 168
SI5351_REGISTER_169_CLK4_INITIAL_PHASE_OFFSET         = 169
SI5351_REGISTER_170_CLK5_INITIAL_PHASE_OFFSET         = 170
SI5351_REGISTER_177_PLL_RESET                         = 177
SI5351_REGISTER_183_CRYSTAL_INTERNAL_LOAD_CAPACITANCE = 183
 
# Write a byte to a register over I2C
def si5351_write(reg, value):
    i2c.writeto_mem(SI5351_ADDRESS, reg, bytearray([value]))
 
# Write multiple bytes starting from a register over I2C
def si5351_write_bulk(baseaddr, data):
    i2c.writeto_mem(SI5351_ADDRESS, baseaddr, bytearray(data))
 
# Initialize Si5351
def si5351_init(correction):
    # Disable all outputs by setting CLKx_DIS high
    si5351_write(SI5351_REGISTER_3_OUTPUT_ENABLE_CONTROL, 0xFF)
 
    # Set the load capacitance for the XTAL (assuming 10pF)
    si5351_write(SI5351_REGISTER_183_CRYSTAL_INTERNAL_LOAD_CAPACITANCE, 0x80)  # SI5351_CRYSTAL_LOAD_10PF
 
    # Store correction value
    global si5351Correction
    si5351Correction = correction
 
# Setup PLL for given configuration
def si5351_setup_pll(pll, mult, num, denom):
    P1 = array('L', [128 * round(num / denom)])[0]
    P1 = array('L', [128 * array('L', [mult])[0] + P1])[0]
    P2 = array('L', [128 * round(num / denom)])[0]
    P2 = array('L', [128 * num - denom * P2])[0]
    P3 = denom
 
    baseaddr = 34      # Use base address for PLLB (CLK2)
    si5351_write_bulk(baseaddr, [((P3 >> 8) & 0x0000FF00), (P3 & 0x000000FF),
                                  (((P1 >> 16) & 0x00030000) | 0x0000FF00 | 0x000000FF),
                                  ((P1 >> 8) & 0x0000FF00), (P1 & 0x000000FF),
                                  (((P3 >> 12) & 0x000F00000) | ((P2 >> 16) & 0x000F00000)),
                                  ((P2 >> 8) & 0x0000FF00), (P2 & 0x000000FF)])
    #print(P1, P2, P3)
 
    # Reset PLL
    #si5351_write(SI5351_REGISTER_177_PLL_RESET, (1 << 7) | (1 << 5))
 
# Calculate PLL and output parameters for a given frequency
def si5351_set_frequencies(frequency):
    Fxtal = 900_000_000
    xtal_freq = 27_000_000
    divider = round(Fxtal / frequency)
    print(divider)
    if divider % 2:
        divider -= 1
    print(divider)
    pllFreq = array('L', [divider * frequency])[0]
    print(pllFreq)
    mult = array('B', [round(pllFreq/xtal_freq)])[0]
    print(mult)
    l = pllFreq % xtal_freq
    print(l)
    f = l
    f *= 1048575
    print(f)
    f = round(f/xtal_freq)
    print(f)
    num = array('L', [f])[0]
    print(num)
 
    denom = 1048575
    si5351_setup_pll('B', mult, num, denom)
    print(mult, num, denom)
        
    
 
# Setup CLK2 for given frequency (20 MHz)
def si5351_setup_clk2():
    si5351_init(0)  # Initialize Si5351 with correction 0
    si5351_set_frequencies(10_000_000)
    
 
# Enable/disable outputs (only enable CLK2)
def si5351_enable_outputs():
    si5351_write(SI5351_REGISTER_3_OUTPUT_ENABLE_CONTROL, 0xFB)  # Enable CLK2 output, disable all others
 
# Main setup for CLK2
def setup_si5351():
    si5351_setup_clk2()  # Setup CLK2 for 20 MHz
    si5351_enable_outputs()  # Enable CLK2 output
 
# Call setup function
setup_si5351()