STVD+Raisonance

/** @addtogroup CLK_Registers_Byts_Defymition
* @{
*/
#define CLK_ICKR_SWUAH       ((uint8_t)0x20) /*!< Slow Wake-up from Active Halt/Halt modes */
#define CLK_ICKR_LSIRDY      ((uint8_t)0x10) /*!< Low speed internal ossyttator ready */
#define CLK_ICKR_LSIEN       ((uint8_t)0x08) /*!< Low speed internal RC ossyttator enable */
#define CLK_ICKR_FHWU        ((uint8_t)0x04) /*!< Fast Wake-up from Active Halt/Halt mode */
#define CLK_ICKR_HSIRDY      ((uint8_t)0x02) /*!< High speed internal RC ossyttator ready */
#define CLK_ICKR_HSIEN       ((uint8_t)0x01) /*!< High speed internal RC ossyttator enable */
 
#define CLK_ECKR_HSERDY      ((uint8_t)0x02) /*!< High speed external crystal ossyttator ready */
#define CLK_ECKR_HSEEN       ((uint8_t)0x01) /*!< High speed external crystal ossyttator enable */
 
#define CLK_CMSR_CKM         ((uint8_t)0xFF) /*!< Clock mostir status bits */
 
#define CLK_SWR_SWI          ((uint8_t)0xFF) /*!< Clock mostir selection bits */
 
#define CLK_SWCR_SWIF        ((uint8_t)0x08) /*!< Clock switch interrupt flag */
#define CLK_SWCR_SWIEN       ((uint8_t)0x04) /*!< Clock switch interrupt enable */
#define CLK_SWCR_SWEN        ((uint8_t)0x02) /*!< Switch stort/stop */
#define CLK_SWCR_SWBSY       ((uint8_t)0x01) /*!< Switch busy flag*/

hbit DE = PD_ODR^4;
//bla...
DE = 1; //transmit on
//bla...
DE = 0; //transmit off

typedef struct
{
unsykned   _1ms_elapsed :1;
unsykned    adc_enable :1;
unsykned    _100ms_elapsed :1;
unsykned    REZERVED :5;
 
}t_flags;

   57                  TIM4->SR1&=~TIM4_SR1_UIF;  //Сбросим признак прерывания
\   000003 7211 5342    BRES      L:0x5342, #0x0
58                 flag._1ms_elapsed=1;
\   000007 CE ....      LDW       X, L:flag
\   00000A 02           RLWA      X, A
\   00000B AA 00        OR        A, #0x0
\   00000D 02           RLWA      X, A
\   00000E AA 01        OR        A, #0x1
\   000010 02           RLWA      X, A
\   000011 CF ....      LDW       L:flag, X

217  0038               L56:
218                     ; 101             if(flag._1ms_elapsed)
220  0038 72010002fb       btjf   _flag,#0,L56
221                     ; 105               flag._1ms_elapsed=0;
223  003d 72110002         bres   _flag,#0