Не генерируется стартовый бит I2C STM32F100RBT6B (STM32 Discovery)

#include <stm32f10x.h> 
#include <stdio.h>
 
 
#define EEPROM_INIT_ADDRESS 0xA0
#define EEPROM_REQUEST_WRITE 0x00
#define EEPROM_REQUEST_READ 0x01
 
static uint8_t a = 16;
static uint8_t c=0;
 
int MASTER, BUSY;
MASTER = 0;
BUSY = 0;
 
uint8_t WRITE_ARR_EDID[128] =
{ 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 
    0x12, 0xE5, 0x00, 0x21, 0x50, 0x2D, 0x31, 0x01, 
    0x1C, 0x13, 0x01, 0x03, 0x81, 0x2F, 0x1A, 0x78, 
    0x2E, 0x35, 0x85, 0xA6, 0x56, 0x48, 0x9A, 0x24, 
    0x12, 0x50, 0x54, 0x00, 0x08, 0x00, 0x01, 0x01, 
    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 
    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x64, 0x19, 
    0x00, 0x40, 0x41, 0x00, 0x26, 0x30, 0x18, 0x88, 
    0x36, 0x00, 0xDC, 0x2E, 0x11, 0x00, 0x00, 0x18, 
    0x00, 0x00, 0x00, 0xFF, 0x00, 0x30, 0x0A, 0x0A, 
    0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 
    0x0A, 0x0A, 0x00, 0x00, 0x00, 0xFD, 0x00, 0x38, 
    0x4B, 0x1E, 0x53, 0x15, 0x00, 0x0A, 0x20, 0x20, 
    0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xFC, 
    0x00, 0x56, 0x47, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 
    0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x01, 0xFF};
 
void GPIO_INIT(void);
void I2C_1_INIT(void);
 
void I2C_1_WRITE_BITE (uint16_t ADDRESS, uint8_t *BUFFER, uint16_t COUNTER);
 
int main(void)
{
    //GPIO_INIT();
    I2C_1_INIT();
    
    MASTER = 0;
    BUSY = 0;
    
    while(c<a)
        {
            I2C_1_WRITE_BITE(0x0000+0x0008*c, WRITE_ARR_EDID, 0+c*8);
            c++;
            /*uint16_t CZ=0;
            while (CZ<10000) CZ++;*/
        }
}
 
void GPIO_INIT(void)
    {
        /* PB6 - SCL, PB7 - SDA*/
        
        GPIOB->CRL &= (0xFF)<<24; //Set 0 PB6 and PB7 bits
        GPIOB->CRL |= 0xFF<<24; //Set PB6 and PB7 bits as 1011
        
        RCC->APB2ENR |= 0x1<<3; //IOPB clock enable
        RCC->APB2ENR |= 0x01<<0; //AFIO clock enable
    }
 
void I2C_1_INIT(void)
    {
        ///I2C init from errata
        I2C1->CR1 &= ~(0x01<<0); //Peripherial disable - just to set I2C safety
        
        RCC->APB2ENR |= 0x1<<3; 
        GPIOB->CRL &= (0xFF)<<24; 
        GPIOB->CRL |= 0x77<<24; 
        GPIOB->ODR |= 0x3<<6; //Set PB6 and PB67 as GP output open-drain, HIGH LEVEL
        
        while(~GPIOB->IDR&(0x3<<6)){} //Check SCL and SDA high level
            
        GPIOB->ODR &=   ~(0x01<<7); //RESET SDA
            
        while(GPIOB->IDR&(0x01<<7)){} //Check SDA is 0
 
        GPIOB->ODR &=   ~(0x01<<6); //RESET SCL
            
        while(GPIOB->IDR&(0x01<<6)){}   //Check SCL is 0
            
        GPIOB->ODR |=   (0x01<<6); //SET SCL
            
        while(~GPIOB->IDR&(0x01<<6)){} //Check SCL is 1     
            
        GPIOB->ODR |=   (0x01<<7); //SET SDA
            
        while(~GPIOB->IDR&(0x01<<7)){} //check SDA is 1
        
        //RCC->APB2ENR |= 0x01<<0; //AFIO clock enable
        GPIOB->CRL &= (0xFF)<<24; 
        GPIOB->CRL |= 0xFF<<24;
            
        I2C1->CR1 |= 0x01<<15; //Set SWRST bit as 1
            
        I2C1->CR1 &= ~(0x01<<15); //Reset SWRST bit
        
        I2C1->CR1 |= (0x01<<0);
        
        ////
        RCC->APB1ENR |= 0x01<<21; //I2C_1 clock enable
        
        I2C1->OAR2 &= ~(0x01<<0); // Double address disable
        I2C1->CR1 &= ~(0x01<<6); //General call disable
        I2C1->CR1 &= ~(0x01<<7); //Clock stretching enable - задержанный отклик, если SLSAVE не может откликнуться мгновенно
        
        I2C1->CR1 &= ~(0x01<<0); //Peripherial disable - just to set I2C safety
 
        I2C1->CR2 |= 0x08; //FREQ for I2C periph = 8MHz
        I2C1->CCR &= ~(0x01<<15|0x01<<14); // Standart mode, ?t_low/t_high = 2? - not sure if it's work on standart mode
        I2C1->CCR |= 0x28; // 0x28 = 40, T_high = CCR*T_PCLK1 = 40*(1/8000000) = 1/100kHz
        
        I2C1->OAR1 = 0x4000;
        
        I2C1->CR1 &= ~(0x01<<1|0x01<<3|0x01<<4);
        
        I2C1->CR1 &= ~(0x01<<10); 
        I2C1->CR1 |= 0x01<<10; //Reset and set Acknowledge enable bit
        
        I2C1->OAR2 &= ~(0xFF);//Reset 0-7 bits
        
        I2C1->CR1 |= 0x01<<0; //Peripherial enable
        
        if (~I2C1->SR2&(0x01<<0)) MASTER=1;
        if (~I2C1->SR2&(0x01<<1)) BUSY=1;
    }
    
void I2C_1_WRITE_BITE (uint16_t ADDRESS, uint8_t *BUFFER, uint16_t COUNTER)
    {
        uint16_t i=0+8*c;
    
    I2C1->CR1&=~(1<<11); //Diasble POS bit in CR1
    I2C1->CR1|=(1<<10); //ACK=1 - acknowledge enable
    I2C1->CR1|=(1<<8); //START=1 - generating start condition
    while(~I2C1->SR1&(1<<0)){}; //Wait for SB bit in SR1 is ready - strat condition generated
    (void) I2C1->SR1;
    I2C1->DR=EEPROM_INIT_ADDRESS|EEPROM_REQUEST_WRITE;
    while(~I2C1->SR1&(1<<1)){} //Wait for ADDR = 1
    uint8_t temp = I2C1->SR1|I2C1->SR2; //Read SR1 and SR2 to clear the ADDR bit
    (void) temp;
    I2C1->DR=(ADDRESS); // Send address (MSB) - 8 bites
    while(~I2C1->SR1&(1<<7)){}//Wait for TxE=1 - Data register empty
    /*I2C1->DR=(ADDRESS); // Send address (MBS - 2nd 8 bites)
    while(~I2C1->SR1&(1<<7)){}//Wait for TxE=1 - Data register empty*/
        
        while(i<COUNTER+8)
        {
            I2C1->DR=WRITE_ARR_EDID[i];
            while(~I2C1->SR1&(1<<7)){}
            i++;
            if (i>127) break;
        }
    /*  
    for(i=0+32*c;i<COUNTER;i++)
    {
        I2C1->DR=WRITE_ARR_EDID[i];
        while(~I2C1->SR1&(1<<7)){}
    }*/
    
    I2C1->CR1|=(1<<9); //STOP=1 - generating stop condition
    }

/*
 * PB10/PB6 - I2C_SCL, PB11/PB7 - I2C_SDA or remap @ PB8 & PB9
 */
void i2c_setup(){
    I2C1->CR1 = 0;
    I2C1->SR1 = 0;
    RCC->APB2ENR |= RCC_APB2ENR_IOPBEN;
    GPIOB->CRL = (GPIOB->CRL & ~(GPIO_CRL_CNF6 | GPIO_CRL_CNF7)) |
            CRL(6, CNF_AFOD | MODE_NORMAL) | CRL(7, CNF_AFOD | MODE_NORMAL);
    RCC->APB1ENR |= RCC_APB1ENR_I2C1EN;
    I2C1->CR2 = 8; // FREQR=8MHz, T=125ns
    I2C1->TRISE = 9; // (9-1)*125 = 1mks
    I2C1->CCR = 40; // normal mode, 8MHz/2/40 = 100kHz
    I2C1->CR1 |= I2C_CR1_PE; // enable periph
}