Работа с Keil начинающего освоение программирования STM32

#include "stm32f10x.h"
 
void SetSysClockTo72(void);
 
void PORTC_13_INIT (void);
 
void SetSysClockTo72(void)
{
    RCC->CR |= RCC_CR_HSEON; // bit 16 HSEON - ON external tackting
    while (READ_BIT (RCC-> CR, RCC_CR_HSERDY == RESET)) {} // waiting for clock stabilization from HSE
    FLASH-> ACR &= (uint32_t) ~FLASH_ACR_PRFTBE;  // turn off the prefetch buffer
    FLASH-> ACR |= FLASH_ACR_PRFTBE; // run the prefetch buffer programmatically - bit number 4,
    FLASH-> ACR &= (uint32_t) ~FLASH_ACR_LATENCY; // resetting a preset setting
    FLASH-> ACR |= FLASH_ACR_LATENCY_2; // delay 2 cycle
    RCC-> CFGR &= ~RCC_CFGR_HPRE; // resetting a preset setting
    RCC-> CFGR |= RCC_CFGR_HPRE_DIV1; // frequency SysClk without division
    RCC-> CFGR &= ~RCC_CFGR_PPRE2; // resetting a preset setting
    RCC-> CFGR |= RCC_CFGR_PPRE2_DIV1; // frequency HCLK without division
    RCC-> CFGR &= ~RCC_CFGR_PPRE1; // resetting a preset setting
    RCC-> CFGR |= RCC_CFGR_PPRE1_DIV2; // frequency HCLK division 2
    RCC-> CFGR &= (uint32_t) ((uint32_t) - (RCC_CFGR_PLLSRC |   RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
    RCC-> CFGR |= (uint32_t) (RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);
    RCC-> CR |= RCC_CR_PLLON; 
    while (READ_BIT (RCC-> CR, RCC_CR_PLLRDY)!= (RCC_CR_PLLRDY)) {}
    RCC-> CFGR &= -RCC_CFGR_SW;
    RCC-> CFGR |= RCC_CFGR_SW_PLL;
    while (READ_BIT (RCC-> CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) {}
}
 
void PORTC_13_INIT (void)
{
    RCC-> APB2ENR |=RCC_APB2ENR_IOPCEN;
    GPIOC-> CRH &= ~GPIO_CRH_MODE13; 
    GPIOC-> CRH |= GPIO_CRH_MODE13_1; 
    GPIOC-> CRH &= ~GPIO_CRH_CNF13; 
}
 
int main (void)
{
    PORTC_13_INIT ();
    while (1)
    {
        GPIOC-> BSRR |= GPIO_BSRR_BS13;
        for (int i = 0; i <1000000; i++) {}
        GPIOC-> BSRR |= GPIO_BSRR_BR13;
        for (int i = 0; i <1000000; i++) {}
    }
}

#include "stm32f1xx_hal.h"

#define GPIO_PP50 0b0011 // push-pull, 50 MHz
uint32_t temp = GPIOC->CRH;
temp &=~ (0b1111 << ((port-8)*4));
temp |= (GPIO_PP50 << ((port-8)*4));
GPIOC->CRH = temp;

ADC_SAMPLING_TIME( ADC_1, marg5(OP2_OUT0), ADC_SAMPL_TIME_240 );
ADC_SAMPLING_TIME( ADC_1, VREF, ADC_SAMPL_TIME_240 );
ADC_SEQ_SET( ADC_1, 1, marg5(OP2_OUT0) );
ADC_SEQ_SET( ADC_1, 2, VREF );
ADC_SEQ_CNT( ADC_1, 2 );

#define dma_cfg_io(dma, dst, src, cnt) do{ \
    _DMA_CH(dma)->PADDR = (uint32_t)(src); \
    _DMA_CH(dma)->MADDR = (uint32_t)(dst); \
    _DMA_CH(dma)->CNTR  = (uint16_t)(cnt); \
    if(0)(( void(*)(volatile void*, volatile void*) )\
      "dma_cfg_io(void*, void*)")(dst, src); \
  }while(0)